搜索资源列表
Xinlinx_Spartan3E500_RevD_10.1
- 这个是我使用xilinx EDK 10.1建立的用语移植petalogic的uclinux发行版本petalinux-v0.4-rc2的Platform工程,开发板使用的是Spartan3E Starter Kit。在这个基础上可以直接裁剪内核后在FPGA中运行uclinux。内核源码可以到developer.petalogix.com下载。,This is a xilinx EDK 10.1, I use the term established by the uclinux transpla
1024FFT FPGA实现仿真参考
- 1024 点FFT,基于基4蝶形运算,在VC编译通过,可以作为FPGA实现仿真参考-1024-point FFT, radix-4 butterfly operations based in the VC compiler, FPGA emulation can be used as reference
FFT-IP.rar
- 在FPGA上实现的fft,里面是一个fft的ip核,直接可以用,编译通过,能正常运行,In the FPGA to achieve the fft, there is a nuclear fft of ip, can be used directly, the compiler is passed, to the normal operation of
canbus
- CAN总线的FPGA实现,用Verilog编写,代码完整,而且有很完善的测试代码,用ISE直接打开,学习FPGA进阶的好项目-CAN Bus FPGA, written with Verilog, code integrity, but also very good test code, using ISE directly open, a good project to learn advanced FPGA
DDR3
- DDR3控制器,基于Altera平台,修改管教后直接可以下载进PFGA-DDR3 controller, based on Altera platform, modify the discipline can be downloaded directly into the PFGA
rs232
- 完整的RS232 Verilog源代码,支持波特率可调,支持调试命令,配合串口调试工具,可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
lcd1602
- 可以用FPGA来实现液晶 1602 显示自己定义的字符-FPGA can be used to achieve their own definition of liquid crystal display characters 1602
vb
- VB写的读取FLASH存储的图像数据,并可以显示图像(图像显示,和读数两大功能),通信采用的68013+FPGA-FLASH write VB to read the stored image data, and can display images (image display, and the readings of the two functions), communication used by 68013+ FPGA
rs232
- FPGA 数字滤波算法 资料,自己可以设计等LMS 算法-FPGA Digital Filter Algorithm for information, they can design LMS algorithm
altera_fft
- alter官方fft程序 使用verilog编写 需要的同学可以下载-alter the official fft program uses verilog prepared students in need can be downloaded
8051ip
- fpga 51核,这个是我老师写的,现在就是输入输出io是分别定义的,希望能给大家提供一点帮助!-fpga 51 nuclear, this is written by my teacher, this is the input and output, respectively, the definition of io is the hope that we can provide a little help!
xapp716_release
- 基于FPGA的SATA控制器,可以完成SATA1.0协议-FPGA-based SATA controller, you can complete SATA1.0 agreement
Verilog_UDP
- 辛辛苦苦找到的UDP的资料,在verilog中UDP指的是用户定义的原语。比如说大家有时候会见到“primitive...table...endtable...endendprimitive”这样的代码段,在书上只能找到大概的解释。到网上查的话又老是跟TCP/IP的UDP冲突。所以特地搜集到了这个东西,希望能帮助大家解决“用户原语”相关的问题。-UDP hard to find the information in verilog in the UDP refers to the user-de
cameralink
- 由于目前基于CameraLink接口的各种相机都不能直接显示,因此本文基于Xilinx公司的Spartan 3系列FPGAXC3S1000-6FG456I设计了一套实时显示系统,该系统可以在不通过系统机的情况下,完成对相机CameraLink信号的接收、缓存、读取并显示 系统采用两片SDRAM作为帧缓存,将输入的CameraLink信号转换成帧频为75Hz,分辨率为1 024×768的XGA格式信号,并采用ADV7123JST芯片实现数模转换,将芯片输出的信号送到VGA接口,通过VGA显示器显示
CF1
- 用VHDL语言实现的CF卡读写源代码,用quartus仿真通过,可实现正常的读写功能-VHDL language with the CF card reader source code, by using quartus simulation, the normal read and write capabilities can be realized
TFTLCD
- 基于FPGA的彩屏LCD控制器,800*480,显示彩条,TFT LCD型号AT070TN83-The TFT Lcd controller based on FPGA.The Matrix is 800*480,it can display color bands.
AlteraFPGA
- FPGA原理图,可以用作最小FPGA系统的制作-FPGA schematics, can be used for the production of the smallest FPGA system
1chipmsx-cd
- VHDL实现的任天堂NES游戏系统,包含了CPU,APG,GPU等各个器件,可以下载到FPGA开发板上运行-VHDL implementation of the Nintendo NES game system includes a CPU, APG, GPU and other various devices, can be downloaded to the FPGA development board to run
rs232
- fpga的串口读写程序,经硬件测试成功,波特率9600.可以改变分频值适应不同的时钟和波特率-fpga serial read and write procedures, by the hardware to test the success of 9600 baud rate. frequency value can be changed to adapt to a different clock and baud rate
DDS
- DDS文件夹内的程序,完成直接数字频率合成功能,有正弦,三角,方波三种波形,并能扫频. 可通过键盘操作设置频率参数和选择波形种类和控制运行. 由两部分组成,"C"文件夹内,是用于在 51 单片机上运行的 C语言程序, "Verilog"文件夹内,是用Verilog语言编写的 FPGA 程序.-DDS program folder, complete direct digital frequency synthesis function, sine, triangle, square